A three-dimensional integrated circuit (3D IC) refers to a 3D IC chip (or package) in which two or more dies are vertically integrated into a single chip. A 2.5D IC chip refers to a chip in which two or more dies are horizontally integrated into a single chip. Generally, each circuit of the 2.5/3D IC is a single die and comprises its own function in the conventional X- and Y-dimensions. The horizontal and vertical integration of the two distinct dies constitutes the 2.5 dimension and the third dimension.
In some approaches of 2.5D/3D IC circuits, two dies are connected through an interconnect, such as a through silicon via (TSV). When the charge distribution and thus the voltage potentials between the two dies are not balanced, a current is created and flows between the two dies potentially damaging the dies. An ESD event generally results in a very high voltage and causes a charge imbalance. As a result, an ESD current resulting from an ESD event may find a path to flow from the operational voltage node of a first die to the reference voltage node of the second die, for example. Some transistors in the first and/or the second die may accidentally be part of the current path. Consequently, the gate oxide of the transistors may be destroyed by the ESD current.
Like reference symbols in the various drawings indicate like elements.